From: Nadav Amit <nadav.amit@xxxxxxxxx> There is no architectural requirement that self-IPI would be received on the next instruction after it is generated. Make the test more robust by not requiring it, and instead wait for some time or until it is received. Signed-off-by: Nadav Amit <nadav.amit@xxxxxxxxx> --- x86/apic.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/x86/apic.c b/x86/apic.c index 0849f87..de5990c 100644 --- a/x86/apic.c +++ b/x86/apic.c @@ -255,13 +255,18 @@ static void self_ipi_isr(isr_regs_t *regs) static void test_self_ipi(void) { + u64 start = rdtsc(); int vec = 0xf1; handle_irq(vec, self_ipi_isr); irq_enable(); apic_icr_write(APIC_DEST_SELF | APIC_DEST_PHYSICAL | APIC_DM_FIXED | vec, 0); - asm volatile ("nop"); + + do { + pause(); + } while (rdtsc() - start < 1000000000 && ipi_count == 0); + report("self ipi", ipi_count == 1); } -- 2.17.1