On Wed, 10 Apr 2019 15:02:25 +0200 Halil Pasic <pasic@xxxxxxxxxxxxx> wrote: > On Wed, 10 Apr 2019 10:25:57 +0200 > Cornelia Huck <cohuck@xxxxxxxxxx> wrote: > > So, what is a high-level summary of areas that need the treatment? > > What I get from looking at the patches so far, it's: > > - stuff that is written by the hypervisor's interrupt injection code: > > IRB, indicators, etc. > > In interrupt context IRB behaves like a control block. We don't have > to make it shared. > > I moved IRB because of snse: > > > @@ -329,9 +329,9 @@ ccw_device_do_sense(struct ccw_device *cdev, struct > irb *irb) /* > * We have ending status but no sense information. Do a basic > sense. */ > - sense_ccw = &to_io_private(sch)->sense_ccw; > + sense_ccw = &to_io_private(sch)->dma_area->sense_ccw; > sense_ccw->cmd_code = CCW_CMD_BASIC_SENSE; > - sense_ccw->cda = (__u32) __pa(cdev->private->irb.ecw); > + sense_ccw->cda = (__u32) __pa(cdev->private->dma_area->irb.ecw); > > as the irb.ecw is used as channel program data. And that needs to be > shared. Ah, I see. So it's more "guest points to some memory where the hypervisor needs to write data"? > > > - buffers that are filled by a channel program: sense, sense id, etc. > > - ccws themselves (because of translation?) > > > > Right. The idea is: smallish, basically fixed size a readily available > control blocks (specified as a ) are copied back and forth by the As a what? :) > ultravisor (via SIE SD). Ok. It's really hard to be sure from the outside what falls into which category :(
