On Fri, Mar 15, 2019 at 11:03 AM Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote:
>
> On 12/03/19 19:48, Jim Mattson wrote:
> > On Mon, Mar 11, 2019 at 7:49 PM Xiaoyao Li <xiaoyao.li@xxxxxxxxxxxxxxx> wrote:
> >>
> >> On Fri, 2019-03-08 at 15:57 +0800, Xiaoyao Li wrote:
> >>> Since MSR_IA32_ARCH_CAPABILITIES is emualted unconditionally even if
> >>> host doesn't suppot it. We should move it to array emulated_msrs from
> >>> arry msrs_to_save, to report to userspace that guest support this msr.
> >>>
> >>
> >> should add this:
> >>
> >> Fixes: 1eaafe91a0df4 ("kvm: x86: IA32_ARCH_CAPABILITIES is always supported")
> >>> Signed-off-by: Xiaoyao Li <xiaoyao.li@xxxxxxxxxxxxxxx>
> >>> ---
> >>> arch/x86/kvm/x86.c | 3 ++-
> >>> 1 file changed, 2 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> >>> index 941f932373d0..5f796e709352 100644
> >>> --- a/arch/x86/kvm/x86.c
> >>> +++ b/arch/x86/kvm/x86.c
> >>> @@ -1125,7 +1125,7 @@ static u32 msrs_to_save[] = {
> >>> #endif
> >>> MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
> >>> MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
> >>> - MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES,
> >>> + MSR_IA32_SPEC_CTRL,
> >>> MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
> >>> MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
> >>> MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
> >>> @@ -1158,6 +1158,7 @@ static u32 emulated_msrs[] = {
> >>>
> >>> MSR_IA32_TSC_ADJUST,
> >>> MSR_IA32_TSCDEADLINE,
> >>> + MSR_IA32_ARCH_CAPABILITIES,
> >>> MSR_IA32_MISC_ENABLE,
> >>> MSR_IA32_MCG_STATUS,
> >>> MSR_IA32_MCG_CTL,
> >>
> >
> > This was part of commit 0ca98f7b1ddb ("kvm: x86:
> > IA32_ARCH_CAPABILITIES may be emulated on Intel"), was it not?
>
> What is this commit coming from? I have queued the patch for after the
> merge window.
Sorry. That commit was never accepted.
