Invalid int type emulation and target not running emulation have
same codes, which update APIC ICR high/low registers, and emulate
sending the IPI.
so fall through this switch cases to reduce duplicate codes and
wide the comment out to 80 columns
Signed-off-by: Li RongQing <lirongqing@xxxxxxxxx>
Signed-off-by: Zhang Yu <zhangyu31@xxxxxxxxx>
---
v1->v2: make cases statements are back-to-back and wide the comment out
to 80 columns as suggested by Sean Christopherson
arch/x86/kvm/svm.c | 28 ++++++++++------------------
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index c6613d1dfa75..db6946791663 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -4498,26 +4498,18 @@ static int avic_incomplete_ipi_interception(struct vcpu_svm *svm)
switch (id) {
case AVIC_IPI_FAILURE_INVALID_INT_TYPE:
- /*
- * AVIC hardware handles the generation of
- * IPIs when the specified Message Type is Fixed
- * (also known as fixed delivery mode) and
- * the Trigger Mode is edge-triggered. The hardware
- * also supports self and broadcast delivery modes
- * specified via the Destination Shorthand(DSH)
- * field of the ICRL. Logical and physical APIC ID
- * formats are supported. All other IPI types cause
- * a #VMEXIT, which needs to emulated.
- */
- kvm_lapic_reg_write(apic, APIC_ICR2, icrh);
- kvm_lapic_reg_write(apic, APIC_ICR, icrl);
- break;
case AVIC_IPI_FAILURE_TARGET_NOT_RUNNING: {
- struct kvm_lapic *apic = svm->vcpu.arch.apic;
-
/*
- * Update ICR high and low, then emulate sending IPI,
- * which is handled when writing APIC_ICR.
+ * AVIC hardware handles the generation of IPIs when the
+ * specified Message Type is Fixed (also known as fixed
+ * delivery mode) and the Trigger Mode is edge-triggered.
+ * The hardware also supports self and broadcast delivery
+ * modes specified via the Destination Shorthand(DSH) field
+ * of the ICRL. Logical and physical APIC ID formats are
+ * supported. All other IPI types cause a #VMEXIT, which
+ * needs to emulated.
+ * AVIC hardware also cannot handle IPIs to cpus that are
+ * not running, emulate the IPI for that case as well
*/
kvm_lapic_reg_write(apic, APIC_ICR2, icrh);
kvm_lapic_reg_write(apic, APIC_ICR, icrl);
--
2.16.2
