On 02/03/19 03:45, Fenghua Yu wrote: > From: Xiaoyao Li <xiaoyao.li@xxxxxxxxxxxxxxx> > > In the latest Intel SDM, CPUID.(EAX=7H,ECX=0):EDX[30] will enumerate > the presence of the IA32_CORE_CAPABILITY MSR. > > Update GET_SUPPORTED_CPUID to expose this feature bit to user space, so > that user space know this bit can be enabled in CPUID. > > Signed-off-by: Xiaoyao Li <xiaoyao.li@xxxxxxxxxxxxxxx> > --- > arch/x86/kvm/cpuid.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index c07958b59f50..e0e17b9c65da 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -410,7 +410,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, > /* cpuid 7.0.edx*/ > const u32 kvm_cpuid_7_0_edx_x86_features = > F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | > - F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP); > + F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(CORE_CAPABILITY) | > + F(INTEL_STIBP); This should be enabled always if boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT), since the MSR is emulated. This way, guests can always rely on IA32_CORE_CAPABILITY_MSR and it won't have to rely on the FMS (which means nothing inside a guest). Paolo > /* all calls to cpuid_count() should be made on the same cpu */ > get_cpu(); >
