On 19/02/19 01:26, Luwei Kang wrote: > Each intel processor trace table of physical addresses (ToPA) entry > has an INT bit. If this bit is set, the processor will signal a > performance-monitoring interrupt (PMI) when the corresponding trace > output region is filled. This patch set will inject a PMI for Intel > Processor Trace when ToPA buffer is filled. > >>From v1: > - Exported a global function pointers may not a good chioce. > Add a new member in kvm_guest_cbs to send Intel PT PMI for KVM guest. > > Luwei Kang (2): > KVM: x86: Inject PMI for KVM guest > KVM: x86: Add support of clear Trace_ToPA_PMI status > > arch/x86/events/intel/core.c | 6 +++++- > arch/x86/include/asm/kvm_host.h | 1 + > arch/x86/include/asm/msr-index.h | 8 ++++++++ > arch/x86/kvm/vmx/pmu_intel.c | 8 +++++++- > arch/x86/kvm/x86.c | 10 ++++++++++ > include/linux/perf_event.h | 1 + > 6 files changed, 32 insertions(+), 2 deletions(-) > Queued, with just a little change in patch 2: diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 6dee7cf24442..f8502c376b37 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -297,9 +297,9 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) pmu->global_ctrl = ((1ull << pmu->nr_arch_gp_counters) - 1) | (((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED); pmu->global_ctrl_mask = ~pmu->global_ctrl; - pmu->global_ovf_ctrl_mask = ~(pmu->global_ctrl | - MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF | - MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD); + pmu->global_ovf_ctrl_mask = pmu->global_ctrl_mask + & ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF | + MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD); if (kvm_x86_ops->pt_supported()) pmu->global_ovf_ctrl_mask &= ~MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI; this makes the review easier, and also makes the assignment look the same as the one inside the "if (kvm_x86_ops->pt_supported())". Paolo
