On 2019/1/29 1:43, Anton Kuchin wrote:
Win10 attempts to save these registers during KiSaveDebugRegisterState if LBR or BTF bits are set in MSR_IA32_DEBUGCTLMSR. It uses DR7 GE and LE flags for per-thread switching of these these features so zero value that is returned for MSR_IA32_DEBUGCTLMSR has no effect. These registers are used for debugging and shouldn't cause #GP and guest crash so just return zeroes just like we do for common x86 LBR MSRs (DEBUGCTLMSR, LAST[BRANCH|INT][TO|FROM]IP). Signed-off-by: Anton Kuchin <antonkuchin@xxxxxxxxxxxxxx> --- arch/x86/kvm/vmx/vmx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index f6915f10e584..8bc56cf027ed 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1769,6 +1769,13 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) else msr_info->data = vmx->pt_desc.guest.addr_a[index / 2]; break; + case MSR_LBR_TOS: + case MSR_LBR_NHM_FROM ... MSR_LBR_NHM_FROM + 31: + case MSR_LBR_NHM_TO ... MSR_LBR_NHM_TO + 31: + case MSR_LBR_CORE_FROM ... MSR_LBR_CORE_FROM + 7: + case MSR_LBR_CORE_TO ... MSR_LBR_CORE_TO + 7: + msr_info->data = 0; + break;
It's better to move LBR stack MSRs set-up to vmx/pmu_intel.c:intel_pmu_get_msr and using specified sizes (31 or 7) is not a good practice.
vLBR is still in an unenabled state and please check https://lkml.org/lkml/2018/12/26/82 for dependency check.
case MSR_TSC_AUX: if (!msr_info->host_initiated && !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
