On 14/02/2019 20:14, Alex Williamson wrote: >> This patch series extends both IOMMU and vfio components to support >> mdev device passing through when it could be isolated and protected >> by the IOMMU units. The first part of this series (PATCH 1/09~6/09) >> adds the interfaces and implementation of the multiple domains per >> device. The second part (PATCH 7/09~9/09) adds the iommu device >> attribute to each mdev, determines isolation type according to the >> existence of an iommu device when attaching group in vfio type1 iommu >> module, and attaches the domain to iommu aware mediated devices. >> >> References: >> [1] https://software.intel.com/en-us/download/intel-virtualization-technology-for-directed-io-architecture-specification >> [2] https://software.intel.com/en-us/download/intel-scalable-io-virtualization-technical-specification >> [3] https://schd.ws/hosted_files/lc32018/00/LC3-SIOV-final.pdf >> >> Best regards, >> Lu Baolu >> >> Change log: >> v5->v6: > > This looks pretty reasonable with Jean-Philippe's nit fixups. Where do > we go from here? I think we need an ack from Kirti since they have an > interest here. Presumably this looks ok to the ARM folks. Looks great from my point of view. I focused on patch 1 since I'm planning to reuse iommu_dev_features for SVA. I don't have time to test auxd and mdev on SMMUv3 at the moment but I had a better look and, if it helps, for patches 1 and 7-9: Reviewed-by: Jean-Philippe Brucker <jean-philippe.brucker@xxxxxxx> That said, are you planning to add back the mdev_get_iommu_domain() function, in a separate patch? Because I think the parent driver still needs a way to retrieve the PASID for an mdev? Thanks, Jean > Do we have > any consumers of this code yet? Theoretically I think a vfio-pci-like > meta driver could be written as an mdev vendor driver with this support > (restricted to type1 iommu use cases). Thanks, > > Alex
