On 01/02/19 06:44, Kang, Luwei wrote:
>
> Do you mean remove the blow code in vmx_vcpu_pi_load() function to make the ON can be set if PIR is not zero?
>
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -1192,21 +1192,6 @@ static void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
> if (!pi_test_sn(pi_desc) && vcpu->cpu == cpu)
> return;
>
> - /*
> - * First handle the simple case where no cmpxchg is necessary; just
> - * allow posting non-urgent interrupts.
> - *
> - * If the 'nv' field is POSTED_INTR_WAKEUP_VECTOR, do not change
> - * PI.NDST: pi_post_block will do it for us and the wakeup_handler
> - * expects the VCPU to be on the blocked_vcpu_list that matches
> - * PI.NDST.
> - */
> - if (pi_desc->nv == POSTED_INTR_WAKEUP_VECTOR ||
> - vcpu->cpu == cpu) {
> - pi_clear_sn(pi_desc);
> - return;
> - }
Yes, exactly.
Paolo
