https://bugzilla.kernel.org/show_bug.cgi?id=202055 --- Comment #32 from LimeTech (tomm@xxxxxxxxxxxxxxxxxxx) --- (In reply to LimeTech from comment #31) > (In reply to Alex Williamson from comment #30) > > (In reply to LimeTech from comment #29) > > > Hi Alex, > > > > > > The "Prefer secondary bus reset over FLR" patch works for devices you > added > > > in pci_dev_reset_methods[]. Will this patch work correctly for a SM2263 > > > controller as well? One such device (Crucial P1 CT500P1SSD8) has PCI ID > > > [c0a9:2263], just a matter of adding this ID? > > > > > > > > > Also, should we be using the "Test patch, NVMe shutdown + delay to avoid > > ACS > > > violation" patch instead? > > > > Hi Tom, > > > > The second patch is intended to be a replacement of the original, it at > > least enables the ADATA drive on a server where the first patch did not, > > even if that turned out to be not exactly the same issue as Dongli > > experiences. To add the SM2263 just add a new ID, ex: > > > > { 0xc0a9, 0x2263, sm2262_reset }, > > > > Add it to the code where the last chunk of the patch includes the known > > SM2262 variants, in the pci_dev_reset_methods array. Please report back > the > > results. > > It's really unfortunate that there's such a fundamental bug in a whole > > family of controllers that's getting rebranded with different PCI IDs by so > > many vendors. Thanks, > > > > Alex > > Thank you, applied patch, will report back. The report is that the patch solved the problem with the Crucial P1 using the SM2263 controller, and also passthrough works perfectly now. thanks Tom -- You are receiving this mail because: You are watching the assignee of the bug.
