On Thu, Jan 24, 2019 at 09:21:31PM +0100, Paolo Bonzini wrote: > On 22/01/19 15:59, Sean Christopherson wrote: > > On Tue, Jan 22, 2019 at 01:35:41PM +0100, Paolo Bonzini wrote: > >> On 18/01/19 22:20, Sean Christopherson wrote: > >>> ...and of course actually call it from C now that the assembly code is > >>> in a dedicated sub-routine and has been cleansed of any quirks that > >>> would break compliance with the kernel's x86 calling conventions. > >> > >> I'm not sure about removing the clobbering. If the stack is outside L1, > >> could this lead to speculative execution with the guest values in the > >> registers? > > > > The stack belongs to the L0 kernel. Or did I misunderstand the comment? > > I meant outside L1 cache (overloaded terms... :)). Alternatively, what about zeroing out the callee-save registers prior to restoring them? That'd allow the function to be called from C, and the patch could be introduced earlier in the series, e.g. to apply the logic to RBP, which is currently only saved/restored. A few extra zeroing XORs is dirt cheap, especially on CPUs with move elimination.
