Hi Janosch,
happy new year!
On 03.01.2019 11:07, Janosch Frank wrote:
LPAR and z/VM start in esam mode depending on the hardware, so we need
Did you consider the CZAM facility? You already use a so called "short
PSW" (which is compatible to the ESA/390 PSW, as you did not set bit 31).
LPAR and z/VM start in esam or esame mode, depending on the hardware
CZAM facility and z/VM MACHINE setting.
See POP section "Load State":
"When neither the configuration-z/Architecture-architectural-mode (CZAM)
facility nor the ESA/390-compatibility-mode facility are installed, this
sets the architectural mode to the ESA/390 mode. When the
ESA/390-compatibility-mode facility is installed, this sets the
architecture mode to the ESA/390-compatibility mode. When the CZAM
facility is installed, the architectural mode is unchanged (that is, it
remains in the z/Architecture architectural mode)."
to switch to z/Arch and set 64 bit addressing.
Wouldn't it be nice to mention this in the commit subject:
s390x: Switch to z/Arch and 64-bit addressing [mode]
Under Qemu/KVM we already start out with both when being run with the
Qemu --kernel argument or we lack 64 bit when booting from disk
because of the initial psw specifying 31 bit for z/VM and lpar
compatibility.
Signed-off-by: Janosch Frank <frankja@xxxxxxxxxxxxx>
Reviewed-by: David Hildenbrand <david@xxxxxxxxxx>
---
s390x/cstart64.S | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/s390x/cstart64.S b/s390x/cstart64.S
index d382497..6622633 100644
--- a/s390x/cstart64.S
+++ b/s390x/cstart64.S
@@ -11,6 +11,7 @@
* under the terms of the GNU Library General Public License version 2.
*/
#include <asm/asm-offsets.h>
+#include <asm/sigp.h>
.section .init
@@ -20,9 +21,18 @@
*
* For KVM and TCG kernel boot we are in 64 bit z/Arch mode.
* When booting from disk the initial short psw is in 31 bit mode.
+ * When running under LPAR or z/VM, we might start in 31 bit and esam mode.
*/
.globl start
start:
+ /* Switch to z/Architecture mode and 64-bit */
+ slr %r0, %r0 # Set cpuid to zero
+ lhi %r1, 2 # mode 2 = esame
+ sigp %r1, %r0, SIGP_SET_ARCHITECTURE
+ /* XOR all registers with themselves to clear them fully. */
+ .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+ xgr \i,\i
+ .endr
sam64 # Set addressing mode to 64 bit
/* setup stack */
larl %r15, stackptr
Regards,
Jens
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