From: Lan Tianyu <Tianyu.Lan@xxxxxxxxxxxxx> This patch is to flush tlb via flush list function. Signed-off-by: Lan Tianyu <Tianyu.Lan@xxxxxxxxxxxxx> --- arch/x86/kvm/paging_tmpl.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h index 833e8855bbc9..866ccdea762e 100644 --- a/arch/x86/kvm/paging_tmpl.h +++ b/arch/x86/kvm/paging_tmpl.h @@ -973,6 +973,7 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) bool host_writable; gpa_t first_pte_gpa; int set_spte_ret = 0; + LIST_HEAD(flush_list); /* direct kvm_mmu_page can not be unsync. */ BUG_ON(sp->role.direct); @@ -980,6 +981,7 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) first_pte_gpa = FNAME(get_level1_sp_gpa)(sp); for (i = 0; i < PT64_ENT_PER_PAGE; i++) { + int tmp_spte_ret = 0; unsigned pte_access; pt_element_t gpte; gpa_t pte_gpa; @@ -1029,14 +1031,24 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) host_writable = sp->spt[i] & SPTE_HOST_WRITEABLE; - set_spte_ret |= set_spte(vcpu, &sp->spt[i], + tmp_spte_ret = set_spte(vcpu, &sp->spt[i], pte_access, PT_PAGE_TABLE_LEVEL, gfn, spte_to_pfn(sp->spt[i]), true, false, host_writable); + + if (kvm_available_flush_tlb_with_range() + && (tmp_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH)) { + struct kvm_mmu_page *leaf_sp = page_header(sp->spt[i] + & PT64_BASE_ADDR_MASK); + list_add(&leaf_sp->flush_link, &flush_list); + } + + set_spte_ret |= tmp_spte_ret; + } if (set_spte_ret & SET_SPTE_NEED_REMOTE_TLB_FLUSH) - kvm_flush_remote_tlbs(vcpu->kvm); + kvm_flush_remote_tlbs_with_list(vcpu->kvm, &flush_list); return nr_present; } -- 2.14.4