... to improve readability and maintainability, and to align the code as per
the layout of the checks in chapter "VM Entries" in Intel SDM vol 3C.
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@xxxxxxxxxx>
Reviewed-by: Mihai Carabas <mihai.carabas@xxxxxxxxxx>
---
x86/vmx_tests.c | 30 +++++++++++++++++++-----------
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c
index 7a8d6ce..50806ab 100644
--- a/x86/vmx_tests.c
+++ b/x86/vmx_tests.c
@@ -4799,18 +4799,10 @@ static void test_vmx_preemption_timer(void)
}
/*
- * Check that the virtual CPU checks all of the VMX controls as
- * documented in the Intel SDM.
+ * Tests for VM-execution control fields
*/
-static void vmx_controls_test(void)
+static void test_vm_execution_ctls(void)
{
- /*
- * Bit 1 of the guest's RFLAGS must be 1, or VM-entry will
- * fail due to invalid guest state, should we make it that
- * far.
- */
- vmcs_write(GUEST_RFLAGS, 0);
-
test_pin_based_ctls();
test_primary_processor_based_ctls();
test_secondary_processor_based_ctls();
@@ -4821,12 +4813,28 @@ static void vmx_controls_test(void)
test_tpr_threshold();
test_nmi_ctrls();
test_pml();
- test_invalid_event_injection();
test_vpid();
test_ept_eptp();
test_vmx_preemption_timer();
}
+/*
+ * Check that the virtual CPU checks all of the VMX controls as
+ * documented in the Intel SDM.
+ */
+static void vmx_controls_test(void)
+{
+ /*
+ * Bit 1 of the guest's RFLAGS must be 1, or VM-entry will
+ * fail due to invalid guest state, should we make it that
+ * far.
+ */
+ vmcs_write(GUEST_RFLAGS, 0);
+
+ test_vm_execution_ctls();
+ test_invalid_event_injection();
+}
+
static bool valid_vmcs_for_vmentry(void)
{
struct vmcs *current_vmcs = NULL;
--
2.9.5
