When doing an IPL normal the memory will not be zeroed and hence the
BSS section can have any value. We need to clear it by ourselves.
Signed-off-by: Janosch Frank <frankja@xxxxxxxxxxxxx>
---
s390x/cstart64.S | 22 ++++++++++++++++++++++
s390x/flat.lds | 2 ++
2 files changed, 24 insertions(+)
diff --git a/s390x/cstart64.S b/s390x/cstart64.S
index 80dbcba..cf22b0d 100644
--- a/s390x/cstart64.S
+++ b/s390x/cstart64.S
@@ -36,7 +36,26 @@ start64:
/* setup initial PSW mask + control registers */
larl %r1, initial_psw
lpswe 0(%r1)
+
+
init_psw_cont:
+ larl %r2, __bss_start
+ larl %r3, __bss_end
+ slgr %r3, %r2 # get sizeof bss
+ ltgr %r3,%r3 # bss empty?
+ jz init_psw_cont
+ aghi %r3,-1
+ srlg %r4,%r3,8
+ ltgr %r4,%r4
+ lgr %r1,%r2
+ jz remainder
+loop:
+ xc 0(256,%r1), 0(%r1)
+ la %r1, 256(%r1)
+ brctg %r4, loop
+remainder:
+ larl %r2, memsetxc
+ ex %r3, 0(%r2)
/* setup pgm interrupt handler */
larl %r1, pgm_int_psw
mvc GEN_LC_PGM_NEW_PSW(16), 0(%r1)
@@ -68,6 +87,9 @@ init_psw_cont:
/* call exit() */
j exit
+memsetxc:
+ xc 0(1,%r1),0(%r1)
+
.macro SAVE_REGS
/* save grs 0-15 */
stmg %r0, %r15, GEN_LC_SW_INT_GRS
diff --git a/s390x/flat.lds b/s390x/flat.lds
index 7cfd9f9..fb229ce 100644
--- a/s390x/flat.lds
+++ b/s390x/flat.lds
@@ -35,7 +35,9 @@ SECTIONS
. = ALIGN(16);
.rodata : { *(.rodata) *(.rodata.*) }
. = ALIGN(16);
+ __bss_start = .;
.bss : { *(.bss) }
+ __bss_end = .;
. = ALIGN(64K);
edata = .;
. += 64K;
--
2.14.3
