On 12/03/2018 11:40 AM, Jim Mattson wrote:
On Fri, Nov 30, 2018 at 11:28 AM Krish Sadhukhan
<krish.sadhukhan@xxxxxxxxxx> wrote:
.. to improve readability and maintainability, and to align the code as per
the layout of the checks in chapter "VM Entries" in Intel SDM vol 3C.
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@xxxxxxxxxx>
Reviewed-by: Mihai Carabas <mihai.carabas@xxxxxxxxxx>
Reviewed-by: Mark Kanda <mark.kanda@xxxxxxxxxx>
I'm not sure that you've accomplished your goal. For instance, the
very first bullet point under section 26.2.1.1: VM-Execution Control
Fields is:
o Reserved bits in the pin-based VM-execution controls must be set properly.
Yet, you didn't move that check into nested_check_vm_execution_controls().
Are you referring to the following check ?
!vmx_control_verify(vmcs12->pin_based_vm_exec_control,
vmx->nested.msrs.pinbased_ctls_low,
vmx->nested.msrs.pinbased_ctls_high) ||
I also think that it would be extremely helpful if this reorganization
resulted with all of the tests in the same order in which they are
enumerated in the SDM.
Will check the order in the SDM and re-order the code accordingly.
