From: Sebastian Andrzej Siewior <bigeasy@xxxxxxxxxxxxx>
Intel SDM says for CPUID function 0DH, sub-function 0:
| • ECX enumerates the size (in bytes) required by the XSAVE instruction for an
| XSAVE area containing all the user state components supported by this
| processor.
| • EBX enumerates the size (in bytes) required by the XSAVE instruction for an
| XSAVE area containing all the user state components corresponding to bits
| currently set in XCR0.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@xxxxxxxxxxxxx>
Message-Id: <20180928104319.3296-1-bigeasy@xxxxxxxxxxxxx>
Reviewed-by: Eduardo Habkost <ehabkost@xxxxxxxxxx>
Signed-off-by: Eduardo Habkost <ehabkost@xxxxxxxxxx>
---
target/i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1469a1be01..fe7c963e5e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4178,7 +4178,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
*ecx = xsave_area_size(x86_cpu_xsave_components(cpu));
*eax = env->features[FEAT_XSAVE_COMP_LO];
*edx = env->features[FEAT_XSAVE_COMP_HI];
- *ebx = *ecx;
+ *ebx = xsave_area_size(env->xcr0);
} else if (count == 1) {
*eax = env->features[FEAT_XSAVE];
} else if (count < ARRAY_SIZE(x86_ext_save_areas)) {
--
2.18.0.rc1.1.g3f1ff2140
