Re: [PATCH 00/10] x86: PTE D Bit based dirty logging

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On 20/10/2018 05:15, Junaid Shahid wrote:
> However, this new mode does incur additional time in the get_dirty_log
> IOCTL because of having to scan all the SPTEs for dirtiness, which can
> in some cases, result in slightly elongating the blackout time. Two
> strategies can be used to mitigate that. The first, included in this
> series, is to have the ability to dynamically switch between D Bit based
> and write protection based dirty logging modes. Then the mode could be
> switched to write protection just before entering blackout, thus incurring
> less time in the get_dirty_log IOCTL during blackout, while keeping the
> reduced overhead of the D Bit based mode during brownout. Secondly, the
> scan in the get_dirty_log IOCTL can be parallelized, which results in that
> IOCTL becoming faster for all modes. That patch series will be sent out
> separately a little later.

I should be really close now to sending the dirty page ring buffer
series, which I think is incompatible with PTE-based dirty logging and
basically removes the cost of ioctls almost entirely, making them
O(#dirtied_pages).  Do you think it's worthwhile to have PTE-based dirty
logging on !PML hosts, even at the cost of disabling the ring buffer?
The reduced performance for write protection is relatively small, less
than 10%, and without the ring buffer we sometimes have to resort to
vCPU stunning because the VM is _still_ running too fast for migration
to converge.

Paolo



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