Re: [RFC PATCH 28/32] KVM: PPC: Book3S HV: Don't access HFSCR, LPIDR or LPCR when running nested

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On Fri, Sep 21, 2018 at 08:01:59PM +1000, Paul Mackerras wrote:
> When running as a nested hypervisor, this avoids reading hypervisor
> privileged registers (specifically HFSCR, LPIDR and LPCR) at startup;
> instead reasonable default values are used.  This also avoids writing
> LPIDR in the single-vcpu entry/exit path.
> 
> Also, this removes the check for CPU_FTR_HVMODE in kvmppc_mmu_hv_init()
> since its only caller already checks this.
> 
> Signed-off-by: Paul Mackerras <paulus@xxxxxxxxxx>

Reviewed-by: David Gibson <david@xxxxxxxxxxxxxxxxxxxxx>

> ---
>  arch/powerpc/kvm/book3s_64_mmu_hv.c |  7 +++----
>  arch/powerpc/kvm/book3s_hv.c        | 33 +++++++++++++++++++++------------
>  2 files changed, 24 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c
> index 68e14af..c615617 100644
> --- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
> +++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
> @@ -268,14 +268,13 @@ int kvmppc_mmu_hv_init(void)
>  {
>  	unsigned long host_lpid, rsvd_lpid;
>  
> -	if (!cpu_has_feature(CPU_FTR_HVMODE))
> -		return -EINVAL;
> -
>  	if (!mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE))
>  		return -EINVAL;
>  
>  	/* POWER7 has 10-bit LPIDs (12-bit in POWER8) */
> -	host_lpid = mfspr(SPRN_LPID);
> +	host_lpid = 0;
> +	if (cpu_has_feature(CPU_FTR_HVMODE))
> +		host_lpid = mfspr(SPRN_LPID);
>  	rsvd_lpid = LPID_RSVD;
>  
>  	kvmppc_init_lpid(rsvd_lpid + 1);
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index 2b66f3f..71ed0cd 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -2191,15 +2191,18 @@ static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm,
>  	 * Set the default HFSCR for the guest from the host value.
>  	 * This value is only used on POWER9.
>  	 * On POWER9, we want to virtualize the doorbell facility, so we
> -	 * turn off the HFSCR bit, which causes those instructions to trap.
> +	 * don't set the HFSCR_MSGP bit, and that causes those instructions
> +	 * to trap and then we emulate them.
>  	 */
> -	vcpu->arch.hfscr = mfspr(SPRN_HFSCR);
> -	if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
> +	vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB |
> +		HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP;
> +	if (cpu_has_feature(CPU_FTR_HVMODE)) {
> +		vcpu->arch.hfscr &= mfspr(SPRN_HFSCR);
> +		if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
> +			vcpu->arch.hfscr |= HFSCR_TM;
> +	}
> +	if (cpu_has_feature(CPU_FTR_TM_COMP))
>  		vcpu->arch.hfscr |= HFSCR_TM;
> -	else if (!cpu_has_feature(CPU_FTR_TM_COMP))
> -		vcpu->arch.hfscr &= ~HFSCR_TM;
> -	if (cpu_has_feature(CPU_FTR_ARCH_300))
> -		vcpu->arch.hfscr &= ~HFSCR_MSGP;
>  
>  	kvmppc_mmu_book3s_hv_init(vcpu);
>  
> @@ -4004,8 +4007,10 @@ int kvmhv_run_single_vcpu(struct kvm_run *kvm_run,
>  
>  	srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
>  
> -	mtspr(SPRN_LPID, vc->kvm->arch.host_lpid);
> -	isync();
> +	if (cpu_has_feature(CPU_FTR_HVMODE)) {
> +		mtspr(SPRN_LPID, vc->kvm->arch.host_lpid);
> +		isync();
> +	}
>  
>  	trace_hardirqs_off();
>  	set_irq_happened(trap);
> @@ -4624,9 +4629,13 @@ static int kvmppc_core_init_vm_hv(struct kvm *kvm)
>  		kvm->arch.host_sdr1 = mfspr(SPRN_SDR1);
>  
>  	/* Init LPCR for virtual RMA mode */
> -	kvm->arch.host_lpid = mfspr(SPRN_LPID);
> -	kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
> -	lpcr &= LPCR_PECE | LPCR_LPES;
> +	if (cpu_has_feature(CPU_FTR_HVMODE)) {
> +		kvm->arch.host_lpid = mfspr(SPRN_LPID);
> +		kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
> +		lpcr &= LPCR_PECE | LPCR_LPES;
> +	} else {
> +		lpcr = 0;
> +	}
>  	lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
>  		LPCR_VPM0 | LPCR_VPM1;
>  	kvm->arch.vrma_slb_v = SLB_VSID_B_1T |

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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