On Fri, Sep 21, 2018 at 08:01:44PM +1000, Paul Mackerras wrote: > When doing nested virtualization, it is only necessary to do the > transactional memory hypervisor assist at level 0, that is, when > we are in hypervisor mode. Nested hypervisors can just use the TM > facilities as architected. Therefore we should clear the > CPU_FTR_P9_TM_HV_ASSIST bit when we are not in hypervisor mode, > along with the CPU_FTR_HVMODE bit. > > Doing this will not change anything at this stage because the only > code that tests CPU_FTR_P9_TM_HV_ASSIST is in HV KVM, which currently > can only be used when when CPU_FTR_HVMODE is set. > > Signed-off-by: Paul Mackerras <paulus@xxxxxxxxxx> Reviewed-by: David Gibson <david@xxxxxxxxxxxxxxxxxxxxx> > --- > arch/powerpc/kernel/cpu_setup_power.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S > index 458b928..c317080 100644 > --- a/arch/powerpc/kernel/cpu_setup_power.S > +++ b/arch/powerpc/kernel/cpu_setup_power.S > @@ -147,8 +147,8 @@ __init_hvmode_206: > rldicl. r0,r3,4,63 > bnelr > ld r5,CPU_SPEC_FEATURES(r4) > - LOAD_REG_IMMEDIATE(r6,CPU_FTR_HVMODE) > - xor r5,r5,r6 > + LOAD_REG_IMMEDIATE(r6,CPU_FTR_HVMODE | CPU_FTR_P9_TM_HV_ASSIST) > + andc r5,r5,r6 > std r5,CPU_SPEC_FEATURES(r4) > blr > -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
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