On Mon, Sep 17, 2018 at 2:36 PM, Krish Sadhukhan <krish.sadhukhan@xxxxxxxxxx> wrote: > There is another combination that we can test: > > "If the EM flag is set, the setting of the TS flag has no effect on > the execution of x87 FPU/MMX/SSE/SSE2/SSE3/SSSE3/SSE4 instructions." Are you suggesting a test case that launches L2 with both CR0.EM and CR0.TS set, to ensure that L1 still gets an #NM intercept? I'm happy to add that.