Re: [PATCH] move performance counter MSR access interception to generic x86 KVM path

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Andre Przywara wrote:
The performance counter MSRs are different for AMD and Intel CPUs and they
are chosen mainly by the CPUID vendor string. This patch catches writes to
all addresses (regardless of VMX/SVM path) and handles them in the generic
MSR handler routine. Writing a 0 into the event select register is something
we perfectly emulate ;-), so don't print out a warning to dmesg in this
case.
This fixes booting a 64bit Windows guest with an AMD CPUID on an Intel host.


Applied, thanks.

--
error compiling committee.c: too many arguments to function

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