On 21/08/18 14:35, Alexander Graf wrote: > On 10/23/2017 06:11 PM, Marc Zyngier wrote: >> The only case where we actually need to perform a dcache maintenance >> is when we map the page for the first time, and subsequent permission >> faults do not require cache maintenance. Let's make it conditional >> on not being a permission fault (and thus a translation fault). >> >> Reviewed-by: Christoffer Dall <christoffer.dall@xxxxxxxxxx> >> Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx> > > This patch unfortunately breaks something on Hi1616 SoCs when running > 32bit guests. With this patch applied (and thus with 4.18) I get random > illegal instruction warnings from 32bit code inside VMs. I do not know > at this point whether this affects other CPUs as well. Can you please give a few more details? - what are the CPUs on this Hi1616? At least a /proc/cpuinfo would help - an example of the crash? Is it within the decompressor? After? This things do matter, given the number of crazy things the 32bit kernel does - a host kernel configuration? > If anyone is interested in a reproducer, I have something handy. But for > now I believe we should just revert this patch. Before we revert anything, I'd like to understand what is happening. Thanks, M. -- Jazz is not dead. It just smells funny...
