On 17/07/2018 12:36, Andrew Jones wrote: > The latest machine type for mach-virt now uses a highmem address > range for ecam space. For arm64 fixup our memory mapping in order > to allow pci-test to access it. For arm, just use the highmem=off > machine property to keep the ecam space in lowmem. > > Signed-off-by: Andrew Jones <drjones@xxxxxxxxxx> > --- > arm/run | 4 ++++ > lib/arm/asm/setup.h | 3 --- > lib/arm/mmu.c | 18 ++++++++++++++++-- > 3 files changed, 20 insertions(+), 5 deletions(-) > > diff --git a/arm/run b/arm/run > index fd280ee19837..277db9bb4a02 100755 > --- a/arm/run > +++ b/arm/run > @@ -35,6 +35,10 @@ if [ "$ACCEL" = "kvm" ]; then > fi > fi > > +if [ "$ARCH" = "arm" ]; then > + M+=",highmem=off" > +fi > + > if ! $qemu $M -device '?' 2>&1 | grep virtconsole > /dev/null; then > echo "$qemu doesn't support virtio-console for chr-testdev. Exiting." > exit 2 > diff --git a/lib/arm/asm/setup.h b/lib/arm/asm/setup.h > index fe9b15f70cd4..b57ea13b9dd2 100644 > --- a/lib/arm/asm/setup.h > +++ b/lib/arm/asm/setup.h > @@ -25,9 +25,6 @@ extern phys_addr_t __phys_offset, __phys_end; > > #define PHYS_OFFSET (__phys_offset) > #define PHYS_END (__phys_end) > -/* mach-virt reserves the first 1G section for I/O */ > -#define PHYS_IO_OFFSET (0UL) > -#define PHYS_IO_END (1UL << 30) > > #define L1_CACHE_SHIFT 6 > #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) > diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c > index 548ec88277bc..03f6622680e3 100644 > --- a/lib/arm/mmu.c > +++ b/lib/arm/mmu.c > @@ -168,9 +168,23 @@ void *setup_mmu(phys_addr_t phys_end) > mmu_idmap = alloc_page(); > memset(mmu_idmap, 0, PAGE_SIZE); > > - mmu_set_range_sect(mmu_idmap, PHYS_IO_OFFSET, > - PHYS_IO_OFFSET, PHYS_IO_END, > + /* > + * mach-virt I/O regions: > + * - The first 1G (arm/arm64) > + * - 512M at 256G (arm64, arm uses highmem=off) > + * - 512G at 512G (arm64, arm uses highmem=off) > + */ > + mmu_set_range_sect(mmu_idmap, > + 0, 0, (1ul << 30), > + __pgprot(PMD_SECT_UNCACHED | PMD_SECT_USER)); > +#ifdef __aarch64__ > + mmu_set_range_sect(mmu_idmap, > + (1ul << 38), (1ul << 38), (1ul << 38) | (1ul << 29), > + __pgprot(PMD_SECT_UNCACHED | PMD_SECT_USER)); > + mmu_set_range_sect(mmu_idmap, > + (1ul << 39), (1ul << 39), (1ul << 40), > __pgprot(PMD_SECT_UNCACHED | PMD_SECT_USER)); > +#endif > > /* armv8 requires code shared between EL1 and EL0 to be read-only */ > mmu_set_range_ptes(mmu_idmap, PHYS_OFFSET, > Applied, thanks. Paolo
