> On Jul 3, 2018, at 6:56 PM, Kang, Luwei <luwei.kang@xxxxxxxxx> wrote:
>
>>> --- a/arch/x86/events/intel/pt.c
>>> +++ b/arch/x86/events/intel/pt.c
>>> @@ -76,14 +76,20 @@
>>> PT_CAP(psb_periods, 1, CPUID_EBX, 0xffff0000),
>>> };
>>>
>>> -u32 pt_cap_get(enum pt_capabilities cap)
>>> +u32 pt_cap_decode(u32 *caps, enum pt_capabilities cap)
>>> {
>>> struct pt_cap_desc *cd = &pt_caps[cap];
>>> - u32 c = pt_pmu.caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg];
>>> + u32 c = caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg];
>>
>> We are accessing offset "cd->leaf * PT_CPUID_REGS_NUM + cd->reg" of array caps. But the array may not be big enough. Is it
>> sufficient to use "struct pt_pmu *pt_pmu" and "pt_pmu->caps" instead?
>>
>
> Thanks for your review.
> Function pt_cap_get() can get the capability of native because "pt_pmu.caps[] " include native Intel PT CPUID info.
> In virtualization, the guest CPUID info is configurable. So I introduce this function pt_cap_decode() to check if guest CPUID support specific capability. I introduce a structure "struct pt_desc" which include a member "u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES]" like native "struct pt_pmu" in patch 8.
> So, I can't use "struct pt_pmu *pt_pmu" or "pt_pmu->caps" here because they are native parameter not guest.
>
> Thanks,
> Luwei Kang
Thanks for the explanation. I think this is OK.
Acked-by: Song Liu <songliubraving@xxxxxx>
>>
>>> unsigned int shift = __ffs(cd->mask);
>>>
>>> return (c & cd->mask) >> shift;
>>> }
>>> +EXPORT_SYMBOL_GPL(pt_cap_decode);
>>> +
>>> +u32 pt_cap_get(enum pt_capabilities cap) {
>>> + return pt_cap_decode(pt_pmu.caps, cap); }
>>> EXPORT_SYMBOL_GPL(pt_cap_get);
>>>
>>> static ssize_t pt_cap_show(struct device *cdev, diff --git
>>> a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h
>>> index 2de4db0..9c71453 100644
>>> --- a/arch/x86/include/asm/intel_pt.h
>>> +++ b/arch/x86/include/asm/intel_pt.h
>>> @@ -27,9 +27,11 @@ enum pt_capabilities { #if
>>> defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) void
>>> cpu_emergency_stop_pt(void); extern u32 pt_cap_get(enum
>>> pt_capabilities cap);
>>> +extern u32 pt_cap_decode(u32 *caps, enum pt_capabilities cap);
>>> #else
>>> static inline void cpu_emergency_stop_pt(void) {} static inline u32
>>> pt_cap_get(enum pt_capabilities cap) { return 0; }
>>> +static u32 pt_cap_decode(u32 *caps, enum pt_capabilities cap) {
>>> +return 0; }
>>> #endif
>>>
>>> #endif /* _ASM_X86_INTEL_PT_H */
>>> --
>>> 1.8.3.1
>>>
>
