> On Jul 3, 2018, at 3:04 AM, Luwei Kang <luwei.kang@xxxxxxxxx> wrote:
>
> CPUID(EAX=14H,ECX=0):EBX[bit 3] = 1 indicates support of output to
> Trace Transport subsystem. MSR IA32_RTIT_CTL.FabricEn[bit 6] is
> reserved if CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 0.
>
> This adds support for "output to Trace Transport subsystem" capability
> of Intel PT. It means that PT can output its trace to an MMIO address
> range rather than system memory buffer.
>
> This also used by KVM for IA32_RTIT_CTL MSR read/write emulation.
> KVM guest write IA32_RTIT_CTL will be trapped to root mode and
> a #GP would be injected to guest if set IA32_RTIT_CTL.FabricEn
> with CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 0.
>
> Signed-off-by: Luwei Kang <luwei.kang@xxxxxxxxx>
> Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> Cc: Ingo Molnar <mingo@xxxxxxxxxx>
> Cc: "H. Peter Anvin" <hpa@xxxxxxxxx>
> Cc: "Peter Zijlstra (Intel)" <peterz@xxxxxxxxxxxxx>
> Cc: Alexander Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>
> Cc: Song Liu <songliubraving@xxxxxx>
> Cc: Kate Stewart <kstewart@xxxxxxxxxxxxxxxxxxx>
> Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
Acked-by: Song Liu <songliubraving@xxxxxx>
> ---
> arch/x86/events/intel/pt.c | 1 +
> arch/x86/include/asm/intel_pt.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c
> index 9f54d8e..00b079e 100644
> --- a/arch/x86/events/intel/pt.c
> +++ b/arch/x86/events/intel/pt.c
> @@ -68,6 +68,7 @@
> PT_CAP(topa_output, 0, CPUID_ECX, BIT(0)),
> PT_CAP(topa_multiple_entries, 0, CPUID_ECX, BIT(1)),
> PT_CAP(single_range_output, 0, CPUID_ECX, BIT(2)),
> + PT_CAP(output_subsys, 0, CPUID_ECX, BIT(3)),
> PT_CAP(payloads_lip, 0, CPUID_ECX, BIT(31)),
> PT_CAP(num_address_ranges, 1, CPUID_EAX, 0x3),
> PT_CAP(mtc_periods, 1, CPUID_EAX, 0xffff0000),
> diff --git a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h
> index 4270421..2de4db0 100644
> --- a/arch/x86/include/asm/intel_pt.h
> +++ b/arch/x86/include/asm/intel_pt.h
> @@ -16,6 +16,7 @@ enum pt_capabilities {
> PT_CAP_topa_output,
> PT_CAP_topa_multiple_entries,
> PT_CAP_single_range_output,
> + PT_CAP_output_subsys,
> PT_CAP_payloads_lip,
> PT_CAP_num_address_ranges,
> PT_CAP_mtc_periods,
> --
> 1.8.3.1
>
