RE: kvm: Fallback/Implementation for MSR_K8_TOP_MEM

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> Do you mean that the kernel was compiled to not look at CPUID?  That is a
bit weird.

Yes, this kernel is shipped in PlayStation 4 consoles and includes drivers
for the console's hardware. Some of these drivers read AMD-specific MSR's
without checking CPUID. In particular, they seem to use MSR_K8_TOP_MEM* to
compute the total RAM available.

My project is forking QEMU to add support for these kernels, but for
performance (TCG is slow) and compatibility (TCG lacks AVX support) reasons,
we rely on KVM and HAXM.

> As for (3), it depends on why you need that.

Indeed, that's what worried me. KVM seems oriented to not "lying" to the
guests about the virtual CPU. Consequently, the API doesn't consider
features like overriding MSR's (which so far seems the only roadblock).
However, since I've seen other AMD MSR's referenced in the codebase [1], so
I thought adding MSR_K8_TOP_MEM would be an acceptable patch. I'm aware that
we could fork KVM and use your kvm-kmod to install an hypervisor compatible
with our kernels, but that would cause most likely discomfort among our
users.

Best,
Alexandro

[1]
https://github.com/torvalds/linux/blob/8d1e5133bf260aabdf2cc6facd4a8e696414d
16a/arch/x86/kvm/x86.c#L2597-L2600


-----Original Message-----
From: Paolo Bonzini <pbonzini@xxxxxxxxxx> 
Sent: Wednesday, June 27, 2018 15:06
To: Alexandro Sanchez Bach <alexandro@xxxxxx>; kvm@xxxxxxxxxxxxxxx
Cc: masonleeback@xxxxxxxxx
Subject: Re: kvm: Fallback/Implementation for MSR_K8_TOP_MEM

On 27/06/2018 14:05, Alexandro Sanchez Bach wrote:
> Some drivers in my FreeBSD-based guest kernel are reading
> MSR_K8_TOP_MEM1 and MSR_K8_TOP_MEM2, which are not implemented in KVM, 
> and do not exist in my host system (these are AMD MSRs, while host is 
> Intel). The reason is that this kernel expects to run on an AMD Jaguar 
> Family CPU. I need fix this problem, so I had few questions:

Do you mean that the kernel was compiled to not look at CPUID?  That is a
bit weird.

> 1. Is it possible to make unimplemented MSR accesses fall back to QEMU?
> 
> 2. If not, is it possible to make QEMU explicitly tell KVM what the 
> value of those MSRs should be?
> 
> 3. If not, should those MSRs be implemented and upstreamed to KVM? I.e.
> would such a patch be accepted, despite these being AMD-specific
registers?
>  
> After reading the API, it seems to me the answer for (1) and (2) is ?no?
> , but I wanted to ask just in case.

Correct.  As for (3), it depends on why you need that.

Paolo




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