Radim Krčmář <rkrcmar@xxxxxxxxxx> writes: > 2018-06-22 16:56+0200, Vitaly Kuznetsov: >> + >> + /* We fail only when APIC is disabled */ >> + if (!kvm_apic_set_irq(vcpu, &irq, NULL)) >> + return HV_STATUS_INVALID_HYPERCALL_INPUT; > > Does Windows use this even for 1 VCPU IPI? > It seems that it does. > I'm thinking we could apply the same optimization we do for LAPIC -- RCU > protected array that maps vp_index to vcpu. Sure, both this and PV TLB flush will benefit. > > Thanks. > >> + } >> + >> +ret_success: >> + return HV_STATUS_SUCCESS; >> +} >> + >> bool kvm_hv_hypercall_enabled(struct kvm *kvm) >> { >> return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE; >> @@ -1526,6 +1628,20 @@ int kvm_hv_hypercall(struct kvm_vcpu *vcpu) >> } >> ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true); >> break; >> + case HVCALL_SEND_IPI: >> + if (unlikely(rep)) { >> + ret = HV_STATUS_INVALID_HYPERCALL_INPUT; >> + break; >> + } >> + ret = kvm_hv_send_ipi(vcpu, ingpa, outgpa, false, fast); >> + break; >> + case HVCALL_SEND_IPI_EX: >> + if (unlikely(fast || rep)) { > > Now I'm getting worried that the ex can be fast as well and we'll be > reading the banks from XMM registers. :) Maybe but currently we don't announce 'parameters through XMM registers' support in KVM (and neither do we support these for Linux-on-Hyper-V as we don't usually use FPU in kernel). -- Vitaly