On 19.06.2018 13:46, Janosch Frank wrote:
> Right now we only catch the exceptions that we really expect to
> receive. Let's at least catch all of them and abort if any of the
> unexpected ones fell on our foot.
>
> Signed-off-by: Janosch Frank <frankja@xxxxxxxxxxxxx>
> ---
> lib/s390x/interrupt.c | 24 +++++++++++++++
> s390x/cstart64.S | 82 +++++++++++++++++++++++++++++++++++++++++++++++----
> 2 files changed, 101 insertions(+), 5 deletions(-)
>
> diff --git a/lib/s390x/interrupt.c b/lib/s390x/interrupt.c
> index bc44e3a..848d5f2 100644
> --- a/lib/s390x/interrupt.c
> +++ b/lib/s390x/interrupt.c
> @@ -104,3 +104,27 @@ void handle_pgm_int(void)
> pgm_int_expected = false;
> fixup_pgm_int();
> }
> +
> +void handle_ext_int(void)
> +{
> + report_abort("Unexpected external call interrupt: at %#lx",
> + lc->ext_old_psw.addr);
> +}
> +
> +void handle_mcck_int(void)
> +{
> + report_abort("Unexpected machine check interrupt: at %#lx",
> + lc->mcck_old_psw.addr);
> +}
> +
> +void handle_io_int(void)
> +{
> + report_abort("Unexpected io interrupt: at %#lx",
> + lc->io_old_psw.addr);
> +}
> +
> +void handle_svc_int(void)
> +{
> + report_abort("Unexpected service call interrupt: at %#lx",
> + lc->svc_old_psw.addr);
> +}
> diff --git a/s390x/cstart64.S b/s390x/cstart64.S
> index 9a26ed3..9cd5c1d 100644
> --- a/s390x/cstart64.S
> +++ b/s390x/cstart64.S
> @@ -26,6 +26,18 @@ init_psw_cont:
> /* setup pgm interrupt handler */
> larl %r1, pgm_int_psw
> mvc GEN_LC_PGM_NEW_PSW(16), 0(%r1)
> + /* setup ext interrupt handler */
> + larl %r1, ext_int_psw
> + mvc GEN_LC_EXT_NEW_PSW(16), 0(%r1)
> + /* setup mcck interrupt handler */
> + larl %r1, mcck_int_psw
> + mvc GEN_LC_MCCK_NEW_PSW(16), 0(%r1)
> + /* setup io interrupt handler */
> + larl %r1, ext_int_psw
> + mvc GEN_LC_IO_NEW_PSW(16), 0(%r1)
> + /* setup svc interrupt handler */
> + larl %r1, mcck_int_psw
> + mvc GEN_LC_SVC_NEW_PSW(16), 0(%r1)
> /* setup cr0, enabling e.g. AFP-register control */
> larl %r1, initital_cr0
> lctlg %c0, %c0, 0(%r1)
> @@ -42,9 +54,7 @@ init_psw_cont:
> /* call exit() */
> j exit
>
> -pgm_int:
> - /* save grs 0-15 */
> - stmg %r0, %r15, GEN_LC_SW_INT_GRS
If you turn this into a makro instead
.macro SAVE_REGS
You can keep the stmg in here as you avoid the brasl in the callers.
You will have to move the code than as it gets to big by placing
.section .text
e.g. above the irq handlers
> +save_fps:
> /* save fprs 0-15 + fpc */
> larl %r1, GEN_LC_SW_INT_FPRS
> std %f0, 0(%r1)
> @@ -64,8 +74,9 @@ pgm_int:
> std %f14, 112(%r1)
> std %f15, 120(%r1)
> stfpc GEN_LC_SW_INT_FPC
> - /* call our c handler */
> - brasl %r14, handle_pgm_int
> + bcr 15, %r14
> +
> +restore_fps:
> /* restore fprs 0-15 + fpc */
> larl %r1, GEN_LC_SW_INT_FPRS
> ld %f0, 0(%r1)
> @@ -85,15 +96,76 @@ pgm_int:
> ld %f14, 112(%r1)
> ld %f15, 120(%r1)
> lfpc GEN_LC_SW_INT_FPC
> + bcr 15, %r14
> +
> +pgm_int:
> + /* save grs 0-15 */
> + stmg %r0, %r15, GEN_LC_SW_INT_GRS
> + brasl %r14, save_fps
> + /* call our c handler */
> + brasl %r14, handle_pgm_int
> + brasl %r14, restore_fps
> /* restore grs 0-15 */
> lmg %r0, %r15, GEN_LC_SW_INT_GRS
> lpswe GEN_LC_PGM_OLD_PSW
>
> +ext_int:
> + /* save grs 0-15 */
> + stmg %r0, %r15, GEN_LC_SW_INT_GRS
> + brasl %r14, save_fps
> + /* call our c handler */
> + brasl %r14, handle_ext_int
> + brasl %r14, restore_fps
> + /* restore grs 0-15 */
> + lmg %r0, %r15, GEN_LC_SW_INT_GRS
> + lpswe GEN_LC_EXT_OLD_PSW
> +
> +mcck_int:
> + /* save grs 0-15 */
> + stmg %r0, %r15, GEN_LC_SW_INT_GRS
> + brasl %r14, save_fps
> + /* call our c handler */
> + brasl %r14, handle_mcck_int
> + brasl %r14, restore_fps
> + /* restore grs 0-15 */
> + lmg %r0, %r15, GEN_LC_SW_INT_GRS
> + lpswe GEN_LC_MCCK_OLD_PSW
> +
> +io_int:
> + /* save grs 0-15 */
> + stmg %r0, %r15, GEN_LC_SW_INT_GRS
> + brasl %r14, save_fps
> + /* call our c handler */
> + brasl %r14, handle_io_int
> + brasl %r14, restore_fps
> + /* restore grs 0-15 */
> + lmg %r0, %r15, GEN_LC_SW_INT_GRS
> + lpswe GEN_LC_IO_OLD_PSW
> +
> +svc_int:
> + /* save grs 0-15 */
> + stmg %r0, %r15, GEN_LC_SW_INT_GRS
> + brasl %r14, save_fps
> + /* call our c handler */
> + brasl %r14, handle_svc_int
> + brasl %r14, restore_fps
> + /* restore grs 0-15 */
> + lmg %r0, %r15, GEN_LC_SW_INT_GRS
> + lpswe GEN_LC_SVC_OLD_PSW
> +
> .align 8
> initital_psw:
> .quad 0x0000000180000000, init_psw_cont
> pgm_int_psw:
> .quad 0x0000000180000000, pgm_int
> +ext_int_psw:
> + .quad 0x0000000180000000, ext_int
> +mcck_int_psw:
> + .quad 0x0000000180000000, mcck_int
> +io_int_psw:
> + .quad 0x0000000180000000, io_int
> +svc_int_psw:
> + .quad 0x0000000180000000, svc_int
> initital_cr0:
> /* enable AFP-register control, so FP regs (+BFP instr) can be used */
> .quad 0x0000000000040000
>
--
Thanks,
David / dhildenb
