On Tue, May 22, 2018 at 12:52:13PM +0800, Luwei Kang wrote: > + /* > + * Any MSR write that attempts to change bits marked reserved will > + * case a #GP fault. > + */ > + if (data & vmx->pt_desc.ctl_bitmask) > + return 1; > + > + /* > + * Any attempt to modify IA32_RTIT_CTL while TraceEn is set will > + * result in a #GP unless the same write also clears TraceEn. > + */ > + if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) && > + ((vmx->pt_desc.guest.ctl ^ data) & ~RTIT_CTL_TRACEEN)) > + return 1; > + > + /* > + * WRMSR to IA32_RTIT_CTL that sets TraceEn but clears this bit > + * and FabricEn would cause #GP, if > + * CPUID.(EAX=14H, ECX=0):ECX.SNGLRGNOUT[bit 2] = 0 > + */ > + if ((data & RTIT_CTL_TRACEEN) && !(data & RTIT_CTL_TOPA) && > + !(data & RTIT_CTL_FABRIC_EN) && > + !pt_cap_decode(vmx->pt_desc.caps, PT_CAP_single_range_output)) > + return 1; Ah, I see. But afaict this is still wrong: PT_CAP_single_range_output is only about allowing !RTIT_CTL_TOPA, FABRIC_EN should be checked separately against the new capability that you added in 4/12. Regards, -- Alex