On 22/05/2018 08:20, Liu, Jingqi wrote: >> >> >> How should the guest detect that the bits are available? Is there a >> CPUID bit? >> >> Paolo > Thanks for your review. > The bit is in a MSR register(33H), and there isn't a corresponding > CPUID bit. > This patch has a dependency on https://lkml.org/lkml/2018/5/14/1157, > which could enable or disable this feature in kernel. > The bit could be modified in guest or host, so need to rdmsr before > vmentry and after vmexit. Yes, but only do that after the first time the guest uses the MSR, or perhaps we could use some trick to limit the cost of vmexits for guests that write to the MSR very rarely. Maybe even require userspace to do a ioctl, for example KVM_ENABLE_CAP, in order to let the guest see the 0x33 MSR (in which case, the guest would pay the price on every vmentry/vmexit). Another optimization possibility is to use a static key so that, if no guest can see the 0x33 MSR, the cost is really zero. Note that this is not premature optimization. vmexit time is really the hottest path in KVM, even removing a local_irq_save/restore can provide a measurable improvement there! So you cannot add 200 clock cycles or worse for an MSR that is essentially a debugging tool. Paolo > And wrmsr if the guest and host settings don't match. > Will improve in next version.
