[PATCH kvm-unit-tests] x86: move TSC_ADJUST MSR to msr.h

[Paolo Bonzini <pbonzini@xxxxxxxxxx>]

The MSR is defined in two places, and a third is coming.  Centralize
the definition.

Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
---
	Committed already, and a prerequisite for the SVM test I've just sent.

 lib/x86/msr.h    |  1 +
 x86/tsc_adjust.c | 30 ++++++++++++++----------------
 x86/vmexit.c     |  5 ++---
 3 files changed, 17 insertions(+), 19 deletions(-)

diff --git a/lib/x86/msr.h b/lib/x86/msr.h
index 3eff710..663bad0 100644
--- a/lib/x86/msr.h
+++ b/lib/x86/msr.h
@@ -207,6 +207,7 @@
 #define MSR_IA32_PLATFORM_ID		0x00000017
 #define MSR_IA32_EBL_CR_POWERON		0x0000002a
 #define MSR_IA32_FEATURE_CONTROL        0x0000003a
+#define MSR_IA32_TSC_ADJUST		0x0000003b
 
 #define FEATURE_CONTROL_LOCKED				(1<<0)
 #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX	(1<<1)
diff --git a/x86/tsc_adjust.c b/x86/tsc_adjust.c
index 725e4ff..20a9e89 100644
--- a/x86/tsc_adjust.c
+++ b/x86/tsc_adjust.c
@@ -1,42 +1,40 @@
 #include "libcflat.h"
 #include "processor.h"
 
-#define IA32_TSC_ADJUST 0x3b
-
 int main()
 {
 	u64 t1, t2, t3, t4, t5;
 	u64 est_delta_time;
 
-	if (cpuid(7).b & (1 << 1)) { // IA32_TSC_ADJUST Feature is enabled?
-		report("IA32_TSC_ADJUST msr initialization",
-				rdmsr(IA32_TSC_ADJUST) == 0x0);
+	if (cpuid(7).b & (1 << 1)) { // MSR_IA32_TSC_ADJUST Feature is enabled?
+		report("MSR_IA32_TSC_ADJUST msr initialization",
+				rdmsr(MSR_IA32_TSC_ADJUST) == 0x0);
 		t3 = 100000000000ull;
 		t1 = rdtsc();
-		wrmsr(IA32_TSC_ADJUST, t3);
+		wrmsr(MSR_IA32_TSC_ADJUST, t3);
 		t2 = rdtsc();
-		report("IA32_TSC_ADJUST msr read / write",
-				rdmsr(IA32_TSC_ADJUST) == t3);
-		report("TSC adjustment for IA32_TSC_ADJUST value",
+		report("MSR_IA32_TSC_ADJUST msr read / write",
+				rdmsr(MSR_IA32_TSC_ADJUST) == t3);
+		report("TSC adjustment for MSR_IA32_TSC_ADJUST value",
 				(t2 - t1) >= t3);
 		t3 = 0x0;
-		wrmsr(IA32_TSC_ADJUST, t3);
-		report("IA32_TSC_ADJUST msr read / write",
-				rdmsr(IA32_TSC_ADJUST) == t3);
+		wrmsr(MSR_IA32_TSC_ADJUST, t3);
+		report("MSR_IA32_TSC_ADJUST msr read / write",
+				rdmsr(MSR_IA32_TSC_ADJUST) == t3);
 		t4 = 100000000000ull;
 		t1 = rdtsc();
 		wrtsc(t4);
 		t2 = rdtsc();
-		t5 = rdmsr(IA32_TSC_ADJUST);
+		t5 = rdmsr(MSR_IA32_TSC_ADJUST);
 		// est of time between reading tsc and writing tsc,
-		// (based on IA32_TSC_ADJUST msr value) should be small
+		// (based on MSR_IA32_TSC_ADJUST msr value) should be small
 		est_delta_time = t4 - t5 - t1;
 		// arbitray 2x latency (wrtsc->rdtsc) threshold
-		report("IA32_TSC_ADJUST msr adjustment on tsc write",
+		report("MSR_IA32_TSC_ADJUST msr adjustment on tsc write",
 				est_delta_time <= (2 * (t2 - t4)));
 	}
 	else {
-		report("IA32_TSC_ADJUST feature not enabled", true);
+		report("MSR_IA32_TSC_ADJUST feature not enabled", true);
 	}
 	return report_summary();
 }
diff --git a/x86/vmexit.c b/x86/vmexit.c
index aef0534..000fff1 100644
--- a/x86/vmexit.c
+++ b/x86/vmexit.c
@@ -36,7 +36,6 @@ static void vmcall(void)
 	asm volatile ("vmcall" : "+a"(a), "=b"(b), "=c"(c), "=d"(d));
 }
 
-#define MSR_TSC_ADJUST 0x3b
 #define MSR_EFER 0xc0000080
 #define EFER_NX_MASK            (1ull << 11)
 
@@ -243,12 +242,12 @@ static void ple_round_robin(void)
 
 static void rd_tsc_adjust_msr(void)
 {
-	rdmsr(MSR_TSC_ADJUST);
+	rdmsr(MSR_IA32_TSC_ADJUST);
 }
 
 static void wr_tsc_adjust_msr(void)
 {
-	wrmsr(MSR_TSC_ADJUST, 0x0);
+	wrmsr(MSR_IA32_TSC_ADJUST, 0x0);
 }
 
 static void wr_kernel_gs_base(void)
-- 
2.17.0