On 6 March 2018 at 17:16, Marc Zyngier <marc.zyngier@xxxxxxx> wrote: > On 06/03/18 16:56, Peter Maydell wrote: >> On 6 March 2018 at 16:43, Marc Zyngier <marc.zyngier@xxxxxxx> wrote: >>> On 06/03/18 16:26, Peter Maydell wrote: >>>> +#define KVM_REG_ARM_SECURE_MASK 0x0000000010000000 >>>> +#define KVM_REG_ARM_SECURE_SHIFT 28 >>>> >>>> #define ARM_CP15_REG_SHIFT_MASK(x,n) \ >>>> (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK) >>>> >>> >>> Don't you also need to define it on the arm64 side? >> >> I don't think so, because AArch64 registers aren't security banked >> (except for some GICv3 ones, which aren't set via GET/SET_ONE_REG.) >> Or is there a case I'm missing? > > There is still the case of AArch32 guests on arm64, for which you'd need > to replicate the change to arch/arm64/include/uapi/asm/kvm.h. The two > architectures have different userspace APIs. I thought that AArch32 guests on arm64 hosts still used the arm64 GET/SET_ONE_REG registers to set the guest's environment? The guest's r0-r7 are in what KVM considers X0..X7, etc, and cp15 registers are accessed by reading/writing their architecturally mapped AArch64 EL1 counterparts. thanks -- PMM
