----- kernellwp@xxxxxxxxx wrote: > 2018-01-04 6:31 GMT+08:00 Jim Mattson <jmattson@xxxxxxxxxx>: > [...] > > + "xor %%r8d, %%r8d \n\t" > > + "xor %%r9d, %%r9d \n\t" > > + "xor %%r10d, %%r10d \n\t" > > + "xor %%r11d, %%r11d \n\t" > > + "xor %%r12d, %%r12d \n\t" > > + "xor %%r13d, %%r13d \n\t" > > + "xor %%r14d, %%r14d \n\t" > > + "xor %%r15d, %%r15d \n\t" > > Why just the low 32-bit of the R8~R15? > > Regards, > Wanpeng Li By Intel SDM 3.4.1.1 General-Purpose Registers in 64-Bit Mode: "32-bit operands generate a 32-bit result, zero-extended to a 64-bit result in the destination general-purpose register." So effectively the instructions above does zero the entire 64-bit of R8~R15. It is better to write "xor %r8d, %r8d" instead of "xor %r8, %r8" just because it saves a REX prefix from instruction encoding. Regards, -Liran
