On 08/02/18 11:00, Christoffer Dall wrote:
On Tue, Jan 09, 2018 at 07:04:00PM +0000, Suzuki K Poulose wrote:
Add a helper to convert ID_AA64MMFR0_EL1:PARange to they physical
*the*
size shift. Limit the size to the maximum supported by the kernel.
Is this just a cleanup or are we actually going to need this feature in
the subsequent patches? That would be nice to motivate in the commit
letter.
It is a cleanup, plus we are going to move the user of the code around from
one place to the other. So this makes it a bit easier and cleaner.
Cc: Mark Rutland <mark.rutland@xxxxxxx>
Cc: Catalin Marinas <catalin.marinas@xxxxxxx>
Cc: Will Deacon <will.deacon@xxxxxxx>
Cc: Marc Zyngier <marc.zyngier@xxxxxxx>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx>
---
arch/arm64/include/asm/cpufeature.h | 16 ++++++++++++++++
arch/arm64/kvm/hyp/s2-setup.c | 28 +++++-----------------------
2 files changed, 21 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index ac67cfc2585a..0564e14616eb 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -304,6 +304,22 @@ static inline u64 read_zcr_features(void)
return zcr;
}
+static inline u32 id_aa64mmfr0_parange_to_phys_shift(int parange)
+{
+ switch (parange) {
+ case 0: return 32;
+ case 1: return 36;
+ case 2: return 40;
+ case 3: return 42;
+ case 4: return 44;
+
+ default:
What is the case we want to cater for with making parange == 5 the
default for unrecognized values?
(I have a feeling that default label comes from making the compiler
happy about potentially uninitialized values once upon a time before a
lot of refactoring happened here.)
That is there to make sure we return 48 iff 52bit support (for that matter,
if there is a new limit in the future) is not enabled.
+ case 5: return 48;
+#ifdef CONFIG_ARM64_PA_BITS_52
+ case 6: return 52;
+#endif
+ }
+}
#endif /* __ASSEMBLY__ */
Could you fold this change into the commit as well:
diff --git a/arch/arm64/kvm/hyp/s2-setup.c b/arch/arm64/kvm/hyp/s2-setup.c
index 603e1ee83e89..eea2fbd68b8a 100644
--- a/arch/arm64/kvm/hyp/s2-setup.c
+++ b/arch/arm64/kvm/hyp/s2-setup.c
@@ -29,7 +29,8 @@ u32 __hyp_text __init_stage2_translation(void)
/*
* Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS
* bits in VTCR_EL2. Amusingly, the PARange is 4 bits, while
- * PS is only 3. Fortunately, bit 19 is RES0 in VTCR_EL2...
+ * PS is only 3. Fortunately, only three bits is actually used to
+ * enode the supported PARange values.
*/
parange = read_sysreg(id_aa64mmfr0_el1) & 7;
if (parange > ID_AA64MMFR0_PARANGE_MAX)
Sure.
Thanks for the review.
Suzuki
