On 07/02/2018 17:06, Brijesh Singh wrote:
> @@ -3148,7 +3152,11 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
> } else {
> /* RAM case */
> ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);
> - memcpy(buf, ptr, l);
> + if (attrs.debug && mr->ram_debug_ops) {
> + mr->ram_debug_ops->read(buf, ptr, l, attrs);
> + } else {
> + memcpy(buf, ptr, l);
> + }
> }
>
> if (release_lock) {
You also need to tweak flatview_read in include/exec/memory.h (probably
by adding an "&& !attrs.debug", which leaves the mr->ram_debug_ops->read
to the slow path in exec.c).
> @@ -3218,11 +3226,13 @@ void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
>
> enum write_rom_type {
> WRITE_DATA,
> + READ_DATA,
> FLUSH_CACHE,
> };
>
> -static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
> - hwaddr addr, const uint8_t *buf, int len, enum write_rom_type type)
> +static inline void cpu_physical_memory_rw_internal(AddressSpace *as,
> + hwaddr addr, uint8_t *buf, int len, MemTxAttrs attrs,
> + enum write_rom_type type)
> {
> hwaddr l;
> uint8_t *ptr;
I wonder if READ_DATA and WRITE_DATA still need to go down to
cpu_physical_memory_rw_internal. Maybe you can just call
address_space_rw with &address_space_memory as the address space, and
"(MemTxAttrs) { .debug = 1 }" as the attributes.
Paolo
> @@ -3237,12 +3247,33 @@ static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as,
> if (!(memory_region_is_ram(mr) ||
> memory_region_is_romd(mr))) {
> l = memory_access_size(mr, l, addr1);
> + /* Pass MMIO down to address address_space_rw */
> + switch (type) {
> + case READ_DATA:
> + case WRITE_DATA:
> + address_space_rw(as, addr1, attrs, buf, l,
> + type == WRITE_DATA);
> + break;
> + case FLUSH_CACHE:
> + break;
> + }
> } else {
> /* ROM/RAM case */
> ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
> switch (type) {
> + case READ_DATA:
> + if (mr->ram_debug_ops) {
> + mr->ram_debug_ops->read(buf, ptr, l, attrs);
> + } else {
> + memcpy(buf, ptr, l);
> + }
> + break;
> case WRITE_DATA:
> - memcpy(ptr, buf, l);
> + if (mr->ram_debug_ops) {
> + mr->ram_debug_ops->write(ptr, buf, l, attrs);
> + } else {
> + memcpy(ptr, buf, l);
> + }
> invalidate_and_set_dirty(mr, addr1, l);
> break;
> case FLUSH_CACHE:
