Hi Karim On Wed, Jan 31, 2018 at 08:37:46PM +0100, KarimAllah Ahmed wrote: > [ Based on a patch from Ashok Raj <ashok.raj@xxxxxxxxx> ] > > Add direct access to MSR_IA32_SPEC_CTRL for guests. This is needed for > guests that will only mitigate Spectre V2 through IBRS+IBPB and will not > be using a retpoline+IBPB based approach. With these changes SPEC_CTRL is properly exposed to the guest when using latest Qemu. > > To avoid the overhead of atomically saving and restoring the > MSR_IA32_SPEC_CTRL for guests that do not actually use the MSR, only > add_atomic_switch_msr when a non-zero is written to it. > > No attempt is made to handle STIBP here, intentionally. Filtering STIBP > may be added in a future patch, which may require trapping all writes > if we don't want to pass it through directly to the guest. > > [dwmw2: Clean up CPUID bits, save/restore manually, handle reset] >