On Wed, Jan 10, 2018 at 8:27 AM, Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote: > I can answer (2) only. > > On 10/01/2018 17:19, Liran Alon wrote: >> (2) On VMExit, Intel recommends to always save guest SPEC_CTRL value, >> set IBRS to 1 (even if it is already set by guest) and stuff RSB. What >> exactly does this write of 1 to IBRS do? >> * a) Does it keep all currently existing BTB/BHB entries created by >> less-privileged prediction-mode and marks them as were created in >> less-privileged prediction-mode such that they won't be used in current >> prediction-mode? >> * b) Or does it, as Paolo has mentioned multiple times, disables the >> branch predictor to never consult the BTB/BHB at all as long as IBRS=1? >> If (b) is true, why is setting IBRS=1 better than just issue an IBPB that clears all entries? At least in that case the > host kernel could still benefict branch prediction performance boost. > > Arjan said (b) is not true on all processor generations. But even if it > were true, setting IBRS=1 is much, much faster than IBPB. > >> If (a) is true, does "IBRS ALL THE TIME" usage is basically a CPU >> change to just create all BTB/BHB entries to be tagged with >> prediction-mode at creation-time and that tag to be compared to current >> prediction-mode when CPU attempts to use BTB/BHB? > > I hope so, and I hope said prediction mode includes PCID/VPID too. Branch prediction entries should probably be tagged with PCID, VPID, EP4TA, and thread ID...the same things used to tag TLB contexts. > While I agree with David that "we have other things to work on for now > before we support hypothetical future hardware", I'd like to make sure > that Intel gets it right... > > Paolo
