On Tue, 9 Jan 2018, Paolo Bonzini wrote: > On 09/01/2018 11:15, Thomas Gleixner wrote: > > On Mon, 8 Jan 2018, Paolo Bonzini wrote: > > > >> This series allows guests to use the MSR_IA32_SPEC_CTRL and > >> MSR_IA32_PRED_CMD model specific registers that were added as mitigations > >> for CVE-2017-5715. > >> > >> These are only the KVM specific parts of the fix. It does *not* yet > >> include any protection for reading host memory from the guest, because > >> that would be done in the same way as the rest of Linux. So there is no > >> IBRS *usage* here, no retpolines, no stuffing of the return stack buffer. > >> (KVM already includes a fix to clear all registers on vmexit, which is > >> enough to block Google Project Zero's PoC exploit). > >> > >> However, I am including the changes to use IBPB (indirect branch > >> predictor barrier) if available. That occurs only when there is a VCPU > >> switch on a physical CPU, thus it has a small impact on performance. > >> > >> The patches are a bit hackish because the relevant cpufeatures have > >> not been included yet, and because I wanted to make the patches easier > >> to backport to distro kernels if desired, but I would still like to > >> have them in 4.16. We really want to coordinate that proper with the ongoing integration of the IB** for bare metal. And that stuff really does not need to be hackish at all. We've spent a lot of effort keeping all of it clean _AND_ available for 4.14 stable consumption. Everything before 4.9 is a big fricking and incompatible mess anyway. > >> Please review. > > > > CC'ing x86@xxxxxxxxxx on this would have been asked too much, right? > > Sorry, my mistake. I'll CC you on v2. All good ... Please add the crowd which has been involved in the bare metal IBRS stuff as well. Thanks, tglx
