On 14/12/2017 04:55, Lan Tianyu wrote: > + * When EFER.LME and CR0.PG are set, CR4.PAE and EFER.LMA > + * must be set. > + */ > + if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG_BIT)) { > + if (!(sregs->cr4 & X86_CR4_PAE_BIT)) > + return -EINVAL; > + if (!(sregs->efer & EFER_LMA)) > + return -EINVAL; > + } else if (sregs->efer & EFER_LMA) This can just be "(sregs->efer & EFER_LMA) || sregs->cs.l", making the next "if" redundant. Even better written as if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG_BIT)) { /* * When EFER.LME and CR0.PG are set, the processor is in * 64-bit mode (though maybe in a 32-bit code segment). * CR4.PAE and EFER.LMA must be set. */ if (... || ...) return -EINVAL; } else { /* * Not in 64-bit mode: EFER.LMA is clear and the code * segment cannot be 64-bit. */ if (... || ...) return -EINVAL; } Paolo > + return -EINVAL; > + > + /* When CS.L is set, vcpu should run in 64-bit mode. */ > + if (sregs->cs.l) > + if (!((sregs->cr0 & X86_CR0_PG_BIT) && > + (sregs->cr4 & X86_CR4_PAE_BIT) && > + (sregs->efer & EFER_LME))) > + return -EINVAL;