Hi, This series aims to fix multiple issues with nested-posted-interrupts. The first patch removes a per vCPU flag called pi_pending which is used to signal KVM that it should emulate nested-posted-interrupt dispatching on next resume of L2. However, this flag is unnecessary as it has the exact same meaning as vmx->nested.pi_desc->control ON bit. The second patch fixes an issue of not re-evaluating what should be done with a new L1 pending interrupt that was discovered by syncing PIR to IRR just before resuming L2 guest. For example, this pending L1 event should in most cases result in exiting from L2 to L1 on external-interrupt. But currently, we will just continue resuming L2 which is wrong. The third patch clean-up & fix handling of directly injecting a L1 interrupt to L2 when L1 don't intercept external-interrupts. The current handling of this case doesn't correctly consider the LAPIC TPR and don't update it's IRR & ISR after injecting the interrupt to L2. Fix this by using standard interrupt-injection code-path in this scenario as-well. The fourth patch fix multiple race-condition issues in sending & dispatching nested-posted-interrupts. The patch fixes these issues by checking if there is pending nested-posted-interrupts before each vmentry and if yes, using self-IPI to make hardware dispatch them instead of emulating behavior in software. The fifth patch fixes a bug of not waking up a halted L2 when L1 sends it a nested-posted-interrupt and L1 doesn't intercept HLT. Regards, -Liran
