Invalidation in SMMU v3

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Hi Jean,

In PASID flow arm_smmu_atc_inv_master_all is called where size and iova of arm_smmu_atc_inv_to_cmd are zero and no address is being filled in struct arm_smmu_cmdq_ent->atc.addr. So how will smmu hardware know if there are any ats translations requested or not ?
How invalidation are carried out in PASID flow w.r.t address and size?


Regards,
Valmiki

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