From: Chao Peng <chao.p.peng@xxxxxxxxxxxxxxx> L1 hypervisor can't get the capability of "TraceEn can be set in VMX operation"(IA32_VMX_MISC[14]=0) and any attempt to set IA32_RTIT_CTL.TraceEn in VMX operation using WRMSR will cause a general-protection exception if IA32_VMX_MISC[14] is 0. So we need to leave out write this msr in L1 VMX operation. Signed-off-by: Chao Peng <chao.p.peng@xxxxxxxxxxxxxxx> Signed-off-by: Luwei Kang <luwei.kang@xxxxxxxxx> --- arch/x86/kvm/vmx.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 091120e..8f61a8d 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -936,6 +936,7 @@ static void vmx_get_segment(struct kvm_vcpu *vcpu, static void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked); static bool nested_vmx_is_page_fault_vmexit(struct vmcs12 *vmcs12, u16 error_code); +static bool vmx_pt_supported(void); static DEFINE_PER_CPU(struct vmcs *, vmxarea); static DEFINE_PER_CPU(struct vmcs *, current_vmcs); @@ -3384,6 +3385,11 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 1; msr_info->data = vcpu->arch.ia32_xss; break; + case MSR_IA32_RTIT_CTL: + if (!vmx_pt_supported()) + return 1; + msr_info->data = vmcs_read64(GUEST_IA32_RTIT_CTL); + break; case MSR_TSC_AUX: if (!msr_info->host_initiated && !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) @@ -3508,6 +3514,11 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) else clear_atomic_switch_msr(vmx, MSR_IA32_XSS); break; + case MSR_IA32_RTIT_CTL: + if (!vmx_pt_supported() || to_vmx(vcpu)->nested.vmxon) + return 1; + vmcs_write64(GUEST_IA32_RTIT_CTL, data); + break; case MSR_TSC_AUX: if (!msr_info->host_initiated && !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) -- 1.8.3.1
