Hi Paolo, On 10/18/17 4:26 AM, Paolo Bonzini wrote: > On 04/10/2017 15:17, Brijesh Singh wrote: >> + /* >> + * On AMD platforms, under certain conditions insn_len may be zero on #NPF. >> + * This can happen if a guest gets a page-fault on data access but the HW >> + * table walker is not able to read the instruction page (e.g instruction >> + * page is not present in memory). >> + * >> + * Typically, when insn_len is zero, x86_emulate_instruction() walks the >> + * guest page table and fetches the instruction bytes from guest memory. >> + * When SEV is enabled, the guest memory is encrypted with guest-specific >> + * key hence hypervisor will not able to fetch the instruction bytes. >> + * In those cases we simply restart the guest. >> + */ >> + if (unlikely(!insn_len) && >> + kvm_x86_ops->mem_enc_enabled && >> + kvm_x86_ops->mem_enc_enabled(vcpu)) >> + return 1; >> + > Is it needed to test mem_enc_enabled? Could it instead test for the > availability of decode assists? We can use X86_FEATURE_DECODEASSIST but since mmu.c is common file hence I was not sure if its safe for the VMX. Is it okay to use decode assist feature bit in mm.c ? > > Thanks, > > Paolo
