From: Wanpeng Li <wanpeng.li@xxxxxxxxxxx> SDM 10.5.1 mentioned: Software should always set the trigger mode in the LVT LINT1 register to 0 (edge sensitive). Level-sensitive interrupts are not supported from LINT1. I can intercept both Linux/windows 7/windows 2016 guests on my hand will set Level-sensitive trigger mode to LVT LINT1 register during boot. This patch avoids the software too fool to set the level-sensitive trigger mode to LVT LINT1 register. Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx> Cc: Radim Krčmář <rkrcmar@xxxxxxxxxx> Signed-off-by: Wanpeng Li <wanpeng.li@xxxxxxxxxxx> --- arch/x86/kvm/lapic.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index a778f1a..26593c7 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1758,6 +1758,8 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) val |= APIC_LVT_MASKED; val &= apic_lvt_mask[(reg - APIC_LVTT) >> 4]; + if (reg == APIC_LVT1) + val &= ~APIC_LVT_LEVEL_TRIGGER; kvm_lapic_set_reg(apic, reg, val); break; -- 2.7.4
