On 11/08/17 07:41, Tian, Kevin wrote: [...] >>> Hi Jean, >>> >>> I think there is another way to support SVM without PASID. >>> >>> Suppose there is a device in the same SOC-chip, the device access memory >> through SMMU(using internal bus instead of PCIe) >>> Once page fault, the device send an event with (vaddr, substreamID) to >> SMMU, then SMMU triggers an event interrupt. >>> >>> In the event interrupt handler, we can implement the same logic as PRI >> interrupt in your patch. >>> What do you think about that? >> What you're describing is the SMMU stall model for platform devices. From >> the driver perspective it's the same as PRI and PASID (SubstreamID=PASID). >> >> When a stall-capable device accesses unmapped memory, the SMMU parks >> the >> transaction and sends an event marked "stall" on the event queue, with a >> stall tag (STAG, roughly equivalent to PRG Index). The OS handles the >> fault and sends a CMD_RESUME command with the status and the STAG. >> Then >> the SMMU completes the access or terminates it. > > Can such platform device send multiple SubstreamIDs, or one ID per > device? Yes, SVM-capable platform devices should issue multiple SubstreamIDs and a single StreamID (equivalent to VT-d's Source-ID). Thanks, Jean
