On 09.08.2017 18:54, Jim Mattson wrote: > Host-initiated writes to the IA32_APIC_BASE MSR do not have to follow > local APIC state transition constraints, but the value written must be > valid. > > Signed-off-by: Jim Mattson <jmattson@xxxxxxxxxx> > --- > arch/x86/kvm/x86.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index d734aa8c5b4f..77f17a6ea48a 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -313,10 +313,10 @@ int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | > 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE); > > + if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE) > + return 1; > if (!msr_info->host_initiated && > - ((msr_info->data & reserved_bits) != 0 || > - new_state == X2APIC_ENABLE || > - (new_state == MSR_IA32_APICBASE_ENABLE && > + ((new_state == MSR_IA32_APICBASE_ENABLE && > old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) || > (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) && > old_state == 0))) > @@ -7444,7 +7444,8 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, > kvm_x86_ops->set_efer(vcpu, sregs->efer); > apic_base_msr.data = sregs->apic_base; > apic_base_msr.host_initiated = true; > - kvm_set_apic_base(vcpu, &apic_base_msr); > + if (kvm_set_apic_base(vcpu, &apic_base_msr)) > + return -EINVAL; > > mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0; > kvm_x86_ops->set_cr0(vcpu, sregs->cr0); > With that check moved to the very top Reviewed-by: David Hildenbrand <david@xxxxxxxxxx> -- Thanks, David
