On Thu, 14 May 2009 10:32:05 +0800 Yu Zhao <yu.zhao@xxxxxxxxx> wrote: > This patch series implements Address Translation Service support for > the Intel IOMMU. The PCIe Endpoint that supports ATS capability can > request the DMA address translation from the IOMMU and cache the > translation itself. This can alleviate IOMMU TLB pressure and improve > the hardware performance in the I/O virtualization environment. > > The ATS is one of PCI-SIG I/O Virtualization (IOV) Specifications. The > spec can be found at: http://www.pcisig.com/specifications/iov/ats/ > (it requires membership). These ones can go through David's tree. You can add my: Acked-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> Thanks, -- Jesse Barnes, Intel Open Source Technology Center -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
