Re: [PATCH 2/4] Userspace changes for configuring irq0->inti2 override (v3)

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On Tue, May 12, 2009 at 01:22:06PM +0300, Avi Kivity wrote:
> Gleb Natapov wrote:
>>>          for (i = 0; i < 24; ++i) {
>>> -            r = kvm_add_irq_route(kvm_context, i, KVM_IRQCHIP_IOAPIC, i);
>>> +            if (i == 0) {
>>> +                r = kvm_add_irq_route(kvm_context, i, KVM_IRQCHIP_IOAPIC, 2);
>>> +            } else if (i != 2) {
>>> +                r = kvm_add_irq_route(kvm_context, i, KVM_IRQCHIP_IOAPIC, i);
>>> +            }
>>>     
>> There is no entry for IRQ2, is this OK? What happens if IRQ2 triggers?
>>   
>
> irq 2 is the PIC cascade interrupt.  If it is somehow triggered, the  
> kernel will ignore it.
>
But here we configure IOAPIC routing. What if IOAPIC is used for
interrupt delivery and something triggers irq2. There is no entry
describing it in IOAPIC routing table, so what gsi it will be mapped
to?

--
			Gleb.
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