On Mon, 2009-05-11 at 12:54 -0500, Anthony Liguori wrote:
> For future ppcemb's, do you know if there is an equivalent of a PF exit
> type? Does the hardware squirrel away the faulting address somewhere
> and set PC to the start of the instruction? If so, no guest memory load
> should be required.
Ahhh... you're saying that the address itself (or offset within a page)
is the hypercall token, totally separate from IO emulation, and so we
could ignore the access size. I guess it looks like this:
page fault vector:
if (faulting_address & PAGE_MASK) == vcpu->hcall_page
handle_hcall(faulting_address & ~PAGE_MASK)
else
if (faulting_address is IO)
emulate_io(faulting_address)
else
handle_pagefault(faulting_address)
Testing for hypercalls in the page fault handler path would add some
overhead, and on processors with software-managed TLBs, the page fault
path is *very* hot. Implementing the above pseudocode wouldn't be ideal,
especially because Power processors with hardware virtualization support
have a separate vector for hypercalls. However, I suspect it wouldn't be
a show-stopper from a performance point of view.
Note that other Power virtualization solutions (hypervisors from IBM,
Sony, and Toshiba) use the dedicated hypercall instruction and interrupt
vector, which after all is how the hardware was designed. To my
knowledge, they also don't do IO emulation, so they avoid both
conditionals in the above psuedocode.
--
Hollis Blanchard
IBM Linux Technology Center
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